LCD Display Controller 1215KB Embedded Display SRAM
• Display feature
− Built-in 1215K bytes frame buffer. Support up to 864 x 480 at 24bpp display
− Support TFT 18/24-bit generic RGB interface panel
− Support 8-bit serial RGB interface
− Hardware rotation of 0, 90, 180, 270 degree
− Hardware display mirroring
− Hardware windowing
− Programmable brightness, contrast and saturation control
− Dynamic Backlight Control (DBC) via PWM signal
• MCU connectivity
− 8/9/16/18/24-bit MCU interface
− Tearing effect signal
• I/O Connectivity
− 4 GPIO pins
• Built-in clock generator
• Deep sleep mode for power saving
• Core supply power (VDDPLL and VDDD): 1.2V±0.1V
• I/O supply power(VDDIO): 1.65V to 3.6V
• LCD interface supply power (VDDLCD): 1.65V to 3.6V
SSD1963QL9.pdf