PIC18F248-I/SP - Microcontrollers with CAN

High-Performance RISC CPU:
• Linear program memory addressing up to 2 Mbytes
• Linear data memory addressing to 4 Kbytes
• Up to 10 MIPS operation
• DC – 40 MHz clock input
• 4 MHz-10 MHz oscillator/clock input with PLL active
• 16-bit wide instructions, 8-bit wide data path
• Priority levels for interrupts
• 8 x 8 Single-Cycle Hardware Multiplier

CAN bus Module Features:
• Complies with ISO CAN Conformance Test
• Message bit rates up to 1 Mbps
• Conforms to CAN 2.0B Active Spec with:
- 29-bit Identifier Fields
- 8-byte message length
- 3 Transmit Message Buffers with prioritization
- 2 Receive Message Buffers
- 6 full, 29-bit Acceptance Filters
- Prioritization of Acceptance Filters
- Multiple Receive Buffers for High Priority Messages to prevent loss due to overflow
- Advanced Error Management Features

DIP28

  PIC18F248.pdf